The interlock circuit provides a means to halt system operation through software when the
Technique Processor detects a major system fault or through hardware when a FAST
STOP switch is pressed.
The FAST STOP switches are located on either side of the control panel housing. The
message, INTERLOCKS OPEN, will appear on both control panel displays when either
FAST STOP switch is pressed. This is considered a fatal error and is recorded in the
EVENT.DAT file. The system is still powered at this time and a system re-boot can be
commanded by pressing any key on the control panel.
The interlock circuit is comprised of the following circuits:
· CPU INTERLOCK
· FAST STOP
· +24V INTERLOCK
· JUMPER E5 / RELAY K4
During the boot sequence the Technique Processor software toggles PIO U27-25, on the
Analog Interface PCB, at a 10 mS rate. Eighteen arrows are displayed on the Control
Panel display at the point in the boot sequence that this occurs.
This 10 mS interlock pulse is detected by pulse detector Q1, Q2 and associated circuitry
on the Analog Interface PCB. As long as the interlock pulses are present, the pulse
detector holds relay K1 energized. This allows +15 VDC to pass through relay K1
contacts 1 & 7 illuminating LED DS1 on the Analog Interface PCB. DS1 indicates that the
signal CPU INTERLOCK (+15V) is present.
The CPU INTERLOCK signal passes through the Motherboard to the Power Motor Relay
PCB where it can be measured on TP3. CPU INTERLOCK momentarily energizes relay
K8 on the Power Motor Relay PCB through the C7/R17 circuit. The CPU INTERLOCK
signal also passes through to the FAST STOP circuit described next.
4 Interlocks / Stator
The CPU INTERLOCK signal passes through both normally closed FAST STOP switches
S1 & S2 and then back to the Power Motor Relay PCB. If a FAST STOP switch is
pressed the interlock circuit is disabled preventing X-ray generation and motor movement.
The path that the CPU INTERLOCK signal takes is described below.
1. The CPU INTERLOCK passes through the energized relay K10
contacts 3 & 4 on the Power Motor Relay PCB. Relay K10 is energized
by +12V (KEY_PWR) when the system is turned on. (See Power
Distribution section for more information.)
2. CPU INTERLOCK then passes through the de-energized relay K4
contacts 11 & 13 on the Power Motor Relay PCB and becomes
3. EMERGENCY_OFF_B passes through the Motherboard, Power Signal
Interface PCB and Control Panel Processor PCB where it becomes
4. EMEROF_HI passes through both normally closed FAST STOP
switches S1 & S2. After passing through S2 it becomes EMEROF_LO
5. EMEROF_LO is then fed back through the Control Panel Processor
PCB, Power Signal Interface PCB and Motherboard to the Power Motor
Relay PCB where it becomes EMERGENCY_OFF_ A (+15V).
EMERGENCY_OFF _A then passes through the momentarily energized relay K8
contacts 4 & 8, on the Power Motor Relay PCB energizing relay K9. When relay K9
energizes EMERGENCY_OFF _A passes through the hold-in contacts 4 & 5 back to the
coil. This holds relay K9 energized after the momentary relay K8 de-energizes. Also,
+24V (+24V_IN) passes through contacts 10 & 11 of relay K9 and becomes
+24V_INTERLOCK. The +24V_INTERLOCK circuit is described next.
Interlocks / Stator 5
The +24V_INTERLOCK signal passes through the Battery Charger PCB to the X-ray
Regulator PCB where it turns on transistor Q1. When Q1 turns on, the signal INTLK goes
low. The logic low INTLK signal goes through the Motherboard to the Analog Interface
PCB where it passes through buffer U45 pins 13 & 7 to PIO U27-11. The PIO U27 passes
the logic low INTLK signal to the Technique Processor via the data bus. This informs the
Technique Processor that the interlock circuit is complete.
In addition, the +24V_INTERLOCK supplies power to other relays in various circuits as
· Relay K2 - The HVDRA & HVDRB safety relay in the kV circuit on the Generator
· Relay K1 - The filament select relay in the mA circuit on the Generator Driver PCB.
· Relays K1 & K2 - The pre-charge relays.